Product Summary

DISTINCTIVE CHARACTERISTICS
■ 5.0 V ± 10%, single power supply operation
— Minimizes system level power requirements
■ Manufactured on 0.32 μm process technology
— Compatible with 0.5 μm Am29F080 device
■ High performance
— Access times as fast as 55 ns
■ Low power consumption
— 25 mA typical active read current
— 30 mA typical program/erase current
— 1 μA typical standby current (standard access
time to active mode)
■ Flexible sector architecture
— 16 uniform sectors of 64 Kbytes each
— Any combination of sectors can be erased.
— Supports full chip erase
— Group sector protection:
A hardware method of locking sector groups to
prevent any program or erase operations within
that sector group
Temporary Sector Group Unprotect allows code
changes in previously locked sectors
■ Embedded Algorithms
— Embedded Erase algorithm automatically
preprograms and erases the entire chip or any
combination of designated sectors
— Embedded Program algorithm automatically
writes and verifies bytes at specified addresses
■ Minimum 1,000,000 program/erase cycles per
sector guaranteed
■ 20-year data retention at 125°C
— Reliable operation for the life of the system
■ Package options
— 40-pin TSOP
— 44-pin SO
■ Compatible with JEDEC standards
— Pinout and software compatible with
single-power-supply Flash standard
— Superior inadvertent write protection
■ Data# Polling and toggle bits
— Provides a software method of detecting program
or erase cycle completion
■ Ready/Busy# output (RY/BY#)
— Provides a hardware method for detecting
program or erase cycle completion
■ Erase Suspend/Erase Resume
— Suspends a sector erase operation to read data
from, or program data to, a non-erasing sector,
then resumes the erase operation
■ Hardware reset pin (RESET#)
— Resets internal state machine to the read mode
■ Command sequence optimized for mass storage
— Specific addresses not required

Diagrams