Product Summary
The CY7C109B-25VC is a high-performance CMOS static RAM organized as 131,072 words by 8 bits. Easy memory expansion is provided by an active LOW Chip Enable (CE1), an active HIGH Chip Enable (CE2), an active LOW Out Enable (OE), and three-state drivers. Writing to the CY7C109B-25VC is accomplished by taking Chip Enable One (CE1) and Write Enable (WE) inputs LOW and Chip Enable Two (CE2) input HIGH. Data on the eight I/O pins (I/O0 through I/O7) is then written into the location specified on the address pins (A0 through A16). Reading from the device is accomplished by taking Chip Enable One (CE1) and Output Enable (OE) LOW while forcing Write Enable (WE) and Chip Enable Two (CE2) HIGH. Under these conditions, the contents of the memory location specified by the address pins will appear on the I/O pins. The eight input/output pins (I/O0 through I/O7) are placed in a high-impedance state when the device is deselected (CE1 HIGH or CE2 LOW), the outputs are disabled (OE HIGH), or during a write operation (CE1 LOW, CE2 HIGH, and WE LOW). The CY7C109B-25VC is available in standard 400-mil-wide SOJ and 32-pin TSOP type I packages. The CY7C109B-25VC is functionally equivalent in all other respects.
Parametrics
CY7C109B-25VC absolute maximum ratings: (1)Storage Temperature: -65℃ to +150℃; (2)Ambient Temperature with Power Applied: -55℃ to +125℃; (3)Supply Voltage on VCC to Relative GND: -0.5V to +7.0V; (4)DC Voltage Applied to Outputs in High Z State: -0.5V to VCC+0.5V; (5)DC Input Voltage: -0.5V to VCC + 0.5V; (6)Current into Outputs (LOW): 20 mA; (7)Static Discharge Voltage: >2001V; (8)Latch-Up Current: >200 mA.
Features
CY7C109B-25VC features: (1)High speed: tAA = 12 ns; (2)Low active power: 495 mW (max. 12 ns); (3)Low CMOS standby power: 55 mW (max.) 4 mW; (4)2.0V Data Retention; (5)Automatic power-down when deselected; (6)TTL-compatible inputs and outputs; (7)Easy memory expansion with CE1, CE2, and OE options.
Diagrams
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